FPGA Floating-Point Library for LabVIEW

The LabVIEW FPGA Floating-Point Library is an add-on software featuring an optimized floating-point library for the LabVIEW FPGA Module. This add-on aids in creating and optimizing reusable, universal intellectual property (IP) cores for the LabVIEW FPGA Module, intended for control and simulation applications. It minimizes the effort required to transfer complex algorithms from desktop or real-time environments to the FPGA, and eliminates the need for extensive error handling for fixed-point algorithms. You can optimize a resource optimization core running outside a single-cycle Timed Loop (SCTL) to minimize resource usage. Additionally, you can use the add-on to optimize a performance optimization (IP) core to achieve better timing performance by running inside an SCTL.

• Eases transition of complex algorithms to FPGA
• Avoids extensive error handling for fixed-point algorithms
• Optimize resource usage outside SCTL
• Enhance timing performance within SCTL